An FPGA-Based Accelerator for Real-Time Peg Transfer Task Assessment in Laparoscopic Box Training

Date of Award

4-2025

Degree Name

Master of Science in Engineering

Department

Electrical and Computer Engineering

First Advisor

Janos Grantner, Ph.D.

Second Advisor

Ikhlas Abdel-Qader, Ph.D., P.E.

Third Advisor

Saad Shebrain, M.D.

Keywords

Field Programmable Gate Array (FPGA), Fundamentals of Laparoscopic Surgery (FLS), fuzzy logic, hardware accelerator, peg transfer task, performance assessment

Access Setting

Masters Thesis-Abstract Only

Restricted to Campus until

4-1-2027

Abstract

The peg transfer task is a crucial exercise in the Fundamentals of Laparoscopic Surgery (FLS) program for developing the dexterity and coordination skills required for laparoscopic surgery. It involves a surgeon holding a grasper in each hand to transfer six pegs on a peg board from the left to the right (or vice versa) and then back again. This task must be accomplished using both graspers while adhering to various constraints on their movement and time. Automating the assessment of this task is crucial for providing objective, consistent, and real-time feedback to laparoscopic surgery trainees, helping them refine their skills more effectively.

Previous work developed a neural network to identify grasper and peg objects in various states. These identified object states are then used as inputs to a sequential algorithm to track the steps of the task and identify various errors. The identified states were further used as inputs to a two-level, cascaded, fuzzy logic system to assess grasper movements. The system ran entirely on a PC but was too slow to provide real-time feedback.

To address this limitation, this thesis presents the development of a custom peg transfer and grasper assessment hardware accelerator using VHDL and its implementation on an SoC-FPGA. The neural network remains on the PC, and data is transferred between the PC and the SoC using a custom-designed UART-based protocol. The accelerator performs the same task while being, on average, over 64 times faster than the previous PC-based implementation. In future work, the neural network running on the PC will be accelerated using the same SoC-FPGA. If necessary, the accelerator can be further pipelined and parallelized to improve performance. In addition, the system can be expanded to other FLS tasks such as suturing. This will pave the way for fully integrated real-time feedback for the trainees, a promising advancement in laparoscopic surgery training.

This document is currently not available here.

Share

COinS