Date of Award
8-2017
Degree Name
Master of Science in Engineering
Department
Electrical and Computer Engineering
First Advisor
Dr. Lina Sawalha
Second Advisor
Dr. Janos Grantner
Third Advisor
Dr. Steven Carr
Keywords
ISA, x86, ARM, alpha, microarchitecture
Access Setting
Masters Thesis-Open Access
Abstract
The recent advances in different instruction set architectures (ISAs) and the way those ISAs are implemented have revived the debate on the role of ISAs in overall performance of a processor. Many people in the computer architecture community believe that with current compiler and microarchitecture advances, the choice of ISA does not remain a decisive matter anymore. On the other hand, some researchers believe that this is not the case and they claim that ISAs can still play a significant role in the overall performance of a computer system. Novel heterogeneous architectures exploiting the diversity of different ISAs have been already introduced. This thesis evaluates applications’ behavior compiled for different RISC (Reduced Instruction Set Computers) and CISC (Complex Instruction Set Computers) ISAs using various microarchitectures. We correlated performance differences of same applications across ISAs to certain ISA features. This work shows that ISAs can affect the overall performance of applications differently based on their inherent characteristics.
Recommended Citation
Akram, Ayaz, "A Study on the Impact of Instruction Set Architectures on Processor’s Performance" (2017). Masters Theses. 1519.
https://scholarworks.wmich.edu/masters_theses/1519