Date of Award
Master of Science in Engineering
Electrical and Computer Engineering
Dr. Damon A. Miller
Dr. Frank L. Severance
Dr. Hossein Mousavineshad
Dr. John Gesink
Masters Thesis-Open Access
A chaotic oscillator may be used as the basic component of an associative memory (AM). An AM is capable of pattern separation and noise reduction. Chua's circuit is a widely used chaotic oscillator. This circuit consists of a nonlinear resistor, two capacitors, an inductor and a resistor. A discrete implementation of Chua's circuit may be built using operational amplifiers, resistors, diodes, or discrete bipolar transistors. CMOS integrated circuit technology provides the opportunity for a compact implementation which enables construction of systems requiring a large number of oscillators. This thesis develops an integrated circuit design based on previous work performed by Cruz et. al. (1993).
The IC chip has been designed using a 2 μ m CMOS process. The IC consists of four operational transconductance amplifiers (OTAs), a resistor and three capacitors. The first two OTAs operate as Chua's diode (Cruz 1993) and the other two OTAs in conjunction with the third capacitor realize an inductor. The design process initially used the Spice3f4 circuit simulation package. The final design used Mentor Graphics for simulation, physical layout, Design Rule Checks (DRC), Layout Versus Schematic checks (LVS) and parasitic extraction. All data files as required by fabrication via the MOSIS service were generated.
Chansilp, Boonsin, "A CMOS Chaotic Oscillator" (2000). Masters Theses. 4850.